PhasorISA.hpp

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// Copyright 2026 Daniel McGuire
// Licensed under the Apache License (with LLVM-Exceptions), Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
// https://llvm.org/LICENSE.txt
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
 
// README
//
// This file defines the Phasor VM instruction set, Bytecode format, and Instruction format.
// Use them to construct custom bytecode. See [phasor-isa(7)](phasor-docs.pages.dev/man?f=phasor-isa.7)
 
#pragma once
 
#include <cstdint>
 
#include <string>
#include <vector>
#include <map>
 
#include "../Value.hpp"
 
namespace Phasor
{
enum class OpCode : uint8_t
{
    // Stack operations
    PUSH_CONST, 
    POP,        
 
    // Arithmetic operations
    IADD,       
    ISUBTRACT,  
    IMULTIPLY,  
    IDIVIDE,    
    IMODULO,    
    FLADD,      
    FLSUBTRACT, 
    FLMULTIPLY, 
    FLDIVIDE,   
    FLMODULO,   
    SQRT,       
    POW,        
    LOG,        
    EXP,        
    SIN,        
    COS,        
    TAN,        
 
    // Unary operations
    NEGATE, 
    NOT,    
 
    // Logical operations
    IAND,  
    IOR,   
    FLAND, 
    FLOR,  
 
    // Comparison operations
    IEQUAL,          
    INOT_EQUAL,      
    ILESS_THAN,      
    IGREATER_THAN,   
    ILESS_EQUAL,     
    IGREATER_EQUAL,  
    FLEQUAL,         
    FLNOT_EQUAL,     
    FLLESS_THAN,     
    FLGREATER_THAN,  
    FLLESS_EQUAL,    
    FLGREATER_EQUAL, 
 
    // Control flow
    JUMP,          
    JUMP_IF_FALSE, 
    JUMP_IF_TRUE,  
    JUMP_BACK,     
 
    // Variable operations
    STORE_VAR, 
    LOAD_VAR,  
 
    // I/O and control
    PRINT,       
    PRINTERROR,  
    READLINE,    
    IMPORT,      
    HALT,        
    CALL_NATIVE, 
    CALL,        
    SYSTEM,      
    SYSTEM_OUT,  
    SYSTEM_ERR,  
    RETURN,      
 
    // Literal values
    TRUE_P,   
    FALSE_P,  
    NULL_VAL, 
 
    // String operations
    LEN,     
    CHAR_AT, 
    SUBSTR,  
 
    NEW_STRUCT, 
    GET_FIELD,  
    SET_FIELD,  
 
    NEW_STRUCT_INSTANCE_STATIC, 
    GET_FIELD_STATIC,           
    SET_FIELD_STATIC,           
 
    // Register operations
    // Data movement
    MOV,          
    LOAD_CONST_R, 
    LOAD_VAR_R,   
    STORE_VAR_R,  
    PUSH_R,       
    PUSH2_R,      
    POP_R,        
    POP2_R,       
 
    // Register arithmetic (3-address code)
    IADD_R,  
    ISUB_R,  
    IMUL_R,  
    IDIV_R,  
    IMOD_R,  
    FLADD_R, 
    FLSUB_R, 
    FLMUL_R, 
    FLDIV_R, 
    FLMOD_R, 
    SQRT_R,  
    POW_R,   
    LOG_R,   
    EXP_R,   
    SIN_R,   
    COS_R,   
    TAN_R,   
 
    // Register comparisons
    IAND_R,  
    IOR_R,   
    IEQ_R,   
    INE_R,   
    ILT_R,   
    IGT_R,   
    ILE_R,   
    IGE_R,   
    FLAND_R, 
    FLOR_R,  
    FLEQ_R,  
    FLNE_R,  
    FLLT_R,  
    FLGT_R,  
    FLLE_R,  
    FLGE_R,  
 
    // Register unary operations
    NEG_R, 
    NOT_R, 
 
    // Register I/O
    PRINT_R,      
    PRINTERROR_R, 
    READLINE_R,   
    SYSTEM_R,     
    SYSTEM_OUT_R, 
    SYSTEM_ERR_R  
};

struct Instruction
{
    OpCode  op;       
    int32_t operand1; 
    int32_t operand2; 
    int32_t operand3; 
 
    // Default constructor
    Instruction() : op(OpCode::HALT), operand1(0), operand2(0), operand3(0)
    {
    }
 
    // Full constructor
    Instruction(OpCode op, int32_t op1 = 0, int32_t op2 = 0, int32_t op3 = 0)
        : op(op), operand1(op1), operand2(op2), operand3(op3)
    {
    }
};

struct StructInfo
{
    std::string              name;            
    int                      firstConstIndex; 
    int                      fieldCount;      
    std::vector<std::string> fieldNames;      
};

struct Bytecode
{
    std::vector<Instruction>   instructions;        
    std::vector<Value>         constants;           
    std::map<std::string, int> variables;           
    std::map<std::string, int> functionEntries;     
    std::map<std::string, int> functionParamCounts; 
    int                        nextVarIndex = 0;    
 
    // Struct section (planned usage by future struct codegen)
    std::vector<StructInfo>    structs;       
    std::map<std::string, int> structEntries; 

    int addConstant(const Value &value)
    {
        constants.push_back(value);
        return static_cast<int>(constants.size()) - 1;
    }

    int getOrCreateVar(const std::string &name)
    {
        auto it = variables.find(name);
        if (it != variables.end())
        {
            return it->second;
        }
        int index = nextVarIndex++;
        variables[name] = index;
        return index;
    }

    void emit(OpCode op, int32_t op1 = 0, int32_t op2 = 0, int32_t op3 = 0)
    {
        instructions.emplace_back(op, op1, op2, op3);
    }
};
 
} // namespace Phasor